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71M6545/71M6545H Data Sheet

6.8.3

71M6545/H Digital Pins

Table 100 lists the digital pins. Pin types: O = Output, I = Input, I/O = Input/Output, N/C = no connect.

The circuit number denotes the equivalent circuit, as specified in 6.8.4 .

Table 100: 71M6545/H Digital Pins

Pin

No.

Name

Type

Circuit

Description

31

30

DIO0/WPULSE

DIO1/VPULSE

29

28

27

26

25

24

23

DIO2/SDCK

DIO3/SDATA

DIO4

DIO5

DIO6/XPULSE

DIO7/YPULSE

DIO8/DI

I/O

3, 4

Multiple-Use Pins. Configurable as DIO or its alternate

function. Alternate functions with proper selection of

associated I/O RAM registers are:

DIO0 = WPULSE (31)

DIO1 = VPULSE (30)

DIO2 = SDCK (29)

DIO3 = SDATA (28)

DIO6 = XPULSE (25)

DIO7 = YPULSE (24)

DIO8 = DI (23)

17–22 DIO[14:9]

8–14 DIO[25:19]

Unused pins must be configured as outputs or

terminated to V3P3/GNDD.

6–7

32

DIO[29:28]

DIO55

3

2

1

64

36

34

35

37

62

63

61

33

15

51

60

59

SPI_CSZ

SPI_DO

SPI_DI

SPI_CKI

E_RXTX

E_RST

E_TCLK

ICE_E

TMUXOUT

TMUX2OUT

RESET

RX

TX

TEST

PB

NC

I

O

I

I

I/O

I/O

O

I

O

I

I

O

I

I

N/C

3, 4

1, 4

4

2

4

2

3

4

7

3

--

SPI interface pins.

Emulator port pins. These pins are activated when the

ICE_E pin is pulled high.

ICE enable. For production units, this pin should be

pulled to GND to disable the emulator port.

Multiplexer/clock output pins .

Chip reset: This input pin is used to reset the chip into a

known state. For normal operation, this pin is pulled low.

To reset the chip, this pin is pulled high. This pin has an

internal 30 μA (nominal) current source pull-down. No

external reset circuitry is necessary.

UART0 input. If this pin is unused it must be

terminated to V3P3D or GNDD.

UART0 output.

Enables Production Test.

This pin must be grounded in normal operation.

Push button input. This pin must be at GNDD when not

active or unused. PB does not have an internal pull-up or

pull-down resistor.

Do not connect this pin.

v2

129

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